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M40Z300AV
3V NVRAM Supervisor for Up to 8 LPSRAMs
FEATURES SUMMARY

CONVERTS LOW POWER SRAM INTO NVRAMs PRECISION POWER MONITORING AND POWER SWITCHING CIRCUITRY AUTOMATIC WRITE-PROTECTION WHEN VCC IS OUT-OF-TOLERANCE TWO-INPUT DECODER ALLOWS CONTROL FOR UP TO 8 SRAMs (with 2 devices active in parallel) SUPPLY VOLTAGE AND POWER-FAIL DESELECT VOLTAGE: - M40Z300AV: VCC = 3.0V to 3.6V THS = VSS: 2.8V VPFD 3.0V RESET OUTPUT (RST) FOR POWER ON RESET BATTERY LOW PIN (BL) LESS THAN 20ns CHIP ENABLE ACCESS PROPAGATION DELAY PACKAGING INCLUDES A 16-LEAD SOIC OR A 28-LEAD SOIC AND SNAPHAT(R) TOP (to be ordered separately) SOIC PACKAGE PROVIDES DIRECT CONNECTION FOR A SNAPHAT TOP WHICH CONTAINS THE BATTERY
Figure 1. 16-pin SOIC Package
16 1
SO16 (MQ)
Figure 2. 28-pin SOIC Package*
SNAPHAT (SH) Crystal/Battery
28 1
SOH28 (MH)
March 2004
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M40Z300AV
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. 16-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2. 28-pin SOIC Package*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 3. Table 1. Figure 4. Figure 5. Figure 6. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M40Z300AV 16-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... ...... ...... ...... ...... .....4 .....4 .....5 .....5 .....5
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Two to Four Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 7. Address-Decode Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Data Retention Lifetime Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power-on Reset Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Battery Low Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 VCC Noise And Negative Going Transients. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 8. Supply Voltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 4. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 9. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 6. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 10.Power Down Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 11.Power Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 7. Power Down/Up Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 12.SOH28 - 28-lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Outline. 14 Table 8. SOH28 - 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data 14 Figure 13.SH - 4-pin SNAPHAT Housing for 48mAh Battery, Package Outline . . . . . . . . . . . . . . . 15 Table 9. SH - 4-pin SNAPHAT Housing for 48mAh Battery, Package Mechanical Data . . . . . . . 15 Figure 14.SH - 4-pin SNAPHAT Housing for 120mAh Battery, Package Outline . . . . . . . . . . . . . . 16 Table 10. SH - 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data . . . . . . 16 Figure 15.SO16 - 16-lead Plastic Small Outline, 150 mils body width, Package Outline . . . . . . . . 17 Table 11. SO16 - 16-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data 17
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M40Z300AV
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 12. Ordering Information Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 13. SNAPHAT(R) Battery Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 14. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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M40Z300AV
DESCRIPTION
The M40Z300AV NVRAM SUPERVISOR is a selfcontained device which converts a standard lowpower SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition occurs, the conditioned chip enable outputs (E1CON to E4CON) are forced inactive to write-protect the stored data in the SRAM. During a power failure, the SRAM is switched from the VCC pin to the lithium cell within the SNAPHAT(R) to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write protected until a valid power condition returns. The 28-pin, 330mil SOIC provides sockets with gold plated contacts for direct connection to a separate SNAPHAT housing containing the battery. The SNAPHAT housing has gold plated pins which mate with the sockets, ensuring reliable connection. The housing is keyed to prevent improper insertion. This unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process which greatly reduces the board manufacturing process complexity of either directly soldering or inserting a battery into a soldered holder. Providing non-volatility becomes a "SNAP." The 16-pin SOIC provides battery pins for an external user-supplied battery. Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is also keyed to prevent reverse insertion. The 28-pin SOIC and battery packages are shipped separately in plastic anti-static tubes or in Tape & Reel form. For the 28-lead SOIC, the battery/crystal package (e.g., SNAPHAT) part number is "M4ZXX-BR00SH" (see Table 13., page 18). Caution: Do not place the SNAPHAT battery top in conductive foam, as this will drain the lithium button-cell battery.
Figure 3. Logic Diagram
VCC B+(1)
Table 1. Signal Names
THS(1) E Threshold Select Input Chip Enable Input Conditioned Chip Enable Output Decoder Inputs Reset Output (Open Drain) Battery Low Output (Open Drain) Supply Voltage Output Supply Voltage Ground Positive Battery Pin Negative Battery Pin Not Connected Internally
THS(2) E B M40Z300AV A
VOUT BL E1CON E2CON E3CON E4CON RST
E1CON - E4CON A, B RST BL VOUT VCC VSS B+
VSS
B-
(1)
AI08893
B -(2) NC
Note: 1. For 16-pin SOIC package only. 2. THS pin must be connected to VSS.
Note: 1. THS pin must be connected to VSS. 2. For M40Z300AV, B- must be connected to the negative battery terminal only (not to Pin 8, VSS).
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M40Z300AV
Figure 4. 28-pin SOIC Connections Figure 5. M40Z300AV 16-pin SOIC Connections
VOUT NC NC RST NC A NC B NC BL NC NC THS VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
AI08894
VCC E NC NC NC E1CON E2CON NC E3CON NC NC NC E4CON NC
VOUT NC RST A B BL THS VSS
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC B-(1) E E1CON E2CON E3CON E4CON B+
AI08895
M40Z300AV
Note: 1. For M40Z300AV, B- must be connected to the negative battery terminal only (not to Pin 8, VSS).
Figure 6. Hardware Hookup
3.3V
VCC
VOUT VCC E2
(1)
0.1F
VCC E2
(1)
VCC E2
(1)
M40Z300AV
VCC E2
(1)
M40Z300AV
0.1F
CMOS SRAM
0.1F
CMOS SRAM
0.1F
CMOS SRAM
0.1F
CMOS SRAM E
E A B E Threshold THS(2) VSS E1CON E2CON E3CON E4CON RST BL To Microprocessor To Battery Monitor Circuit
E
E
AI08896
Note: 1. If the second chip enable pin (E2) is unused, it should be tied to VOUT. 2. THS pin must be connected to VSS.
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M40Z300AV
OPERATION
The M40Z300AV, as shown in Figure 6., page 5, can control up to four (eight, if placed in parallel) standard low-power SRAMs. These SRAMs must be configured to have the chip enable input disable all other input signals. Most slow, low-power SRAMs are configured like this, however many fast SRAMs are not. During normal operating conditions, the conditioned chip enable (E1CON to E4CON) output pins follow the chip enable (E) input pin with timing shown in Figure 7., page 6 and Table 7., page 13. An internal switch connects VCC to VOUT. This switch has a voltage drop of less than 0.3V (IOUT1). When VCC degrades during a power failure, E1CON to E4CON are forced inactive independent of E. In this situation, the SRAM is unconditionally write protected as VCC falls below an out-of-tolerance threshold (VPFD). For the M40Z300AV, the THS pin must be tied to ground (as shown in Table 6., page 11). If chip enable access is in progress during a power fail detection, that memory cycle continues to completion before the memory is write protected. If the memory cycle is not terminated within time tWPT, E1CON to E4CON are unconditionally driven high, write protecting the SRAM. A power failure during Table 2. Truth Table
Inputs E H L L L L B X L L H H A X L H L H E1CON H L H H H E2CON H H L H H Outputs E3CON H H H L H E4CON H H H H L
a WRITE cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the SRAM's contents. At voltages below VPFD (min), the user can be assured the memory will be write protected within the Write Protect Time (tWPT) provided the VCC fall time exceeds tF (see Figure 7., page 6). As VCC continues to degrade, the internal switch disconnects VCC and connects the internal battery to VOUT. This occurs at the switchover voltage (VSO). Below the VSO, the battery provides a voltage VOHB to the SRAM and can supply current IOUT2 (see Table 6., page 11). When VCC rises above VSO, VOUT is switched back to the supply voltage. Outputs E1CON to E4CON are held inactive for tCER (120ms maximum) after the power supply has reached VPFD, independent of the E input, to allow for processor stabilization (see Figure 11., page 12). Two to Four Decode The M40Z300AV includes a 2 input (A, B) decoder which allows the control of up to 4 independent SRAMs. The Truth Table for these inputs is shown in Table 2.
Figure 7. Address-Decode Time
A, B tAS
E tEDL E1CON - E4CON tEDH
AI02551
Note: During system design, compliance with the SRAM timing parameters must comprehend the propagation delay between E1CON E4CON.
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M40Z300AV
Data Retention Lifetime Calculation Most low power SRAMs on the market today can be used with the M40Z300AV NVRAM SUPERVISOR. There are, however some criteria which should be used in making the final choice of which SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M40Z300AV and SRAMs to be "Don't care" once VCC falls below VPFD(min). The SRAM should also guarantee data retention down to VCC = 2.0V. The chip enable access time must be sufficient to meet the system needs with the chip enable propagation delays included. If the SRAM includes a second chip enable pin (E2), this pin should be tied to VOUT. If data retention lifetime is a critical parameter for the system, it is important to review the data retention current specifications for the particular SRAMs being evaluated. Most SRAMs specify a data retention current at 3.0V. Manufacturers generally specify a typical condition for room temperature along with a worst case condition (generally at elevated temperatures). The system level requirements will determine the choice of which value to use. The data retention current value of the SRAMs can then be added to the IBAT value of the M40Z300AV to determine the total current requirements for data retention. The available battery capacity for the SNAPHAT(R) of your choice can then be divided by this current to determine the amount of data retention available (see Table 13., page 18). CAUTION: Take care to avoid inadvertent discharge through VOUT and E1CON - E4CON after battery has been attached. For a further more detailed review of lifetime calculations, please see Application Note AN1012. Power-on Reset Output All microprocessors have a reset input which forces them to a known state when starting. The M40Z300AV has a reset output (RST) pin which is guaranteed to be low within tWPT of VPFD (see Table 7., page 13). This signal is an open drain configuration. An appropriate pull-up resistor should
be chosen to control the rise time. This signal will be valid for all voltage conditions, even when VCC equals VSS. Once VCC exceeds the power failure detect voltage VPFD, an internal timer keeps RST low for tREC to allow the power supply to stabilize. Battery Low Pin The M40Z300AV automatically performs battery voltage monitoring upon power-up, and at factoryprogrammed time intervals of at least 24 hours. The Battery Low (BL) pin will be asserted if the battery voltage is found to be less than approximately 2.5V. The BL pin will remain asserted until completion of battery replacement and subsequent battery low monitoring tests, either during the next power-up sequence or the next scheduled 24-hour interval. If a battery low is generated during a power-up sequence, this indicates that the battery is below 2.5V and may not be able to maintain data integrity in the SRAM. Data should be considered suspect, and verified as correct. A fresh battery should be installed. If a battery low indication is generated during the 24-hour interval check, this indicates that the battery is near end of life. However, data is not compromised due to the fact that a nominal VCC is supplied. In order to insure data integrity during subsequent periods of battery back-up mode, the battery should be replaced. The SNAPHAT(R) top should be replaced with valid VCC applied to the device. The M40Z300AV only monitors the battery when a nominal VCC is applied to the device. Thus applications which require extensive durations in the battery back-up mode should be powered-up periodically (at least once every few months) in order for this technique to be beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon power-up via a checksum or other technique. The BL pin is an open drain output and an appropriate pull-up resistor to VCC should be chosen to control the rise time.
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M40Z300AV
VCC Noise And Negative Going Transients ICC transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1F (as shown in Figure 8) is recommended in order to provide the needed filtering. In addition to transients that are caused by normal SRAM operation, power cycling can generate negative voltage spikes on VCC that drive it to values below VSS by as much as one volt. These negative spikes can cause data corruption in the SRAM while in battery backup mode. To protect from these voltage spikes, STMicroelectronics recommends connecting a schottky diode from VCC to VSS (cathode connected to VCC, anode to VSS). Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount. Figure 8. Supply Voltage Protection
VCC VCC
0.1F
DEVICE
VSS
AI00622
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M40Z300AV
MAXIMUM RATING
Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is Table 3. Absolute Maximum Ratings
Symbol TA Parameter Grade 1 Ambient Operating Temperature Grade 6 Storage Temperature Lead Solder Temperature for 10 seconds Input or Output Voltage Supply Voltage Output Current Power Dissipation SNAPHAT(R) SOIC TSLD(1,2,3) VIO VCC IO PD -40 to 85 -40 to 85 -55 to 125 260 -0.3 to VCC + 0.3 -0.3 to 4.6 20 1 C C C C V V mA W Value 0 to 70 Unit C
not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
TSTG
Note: 1. Reflow at peak temperature of 215C to 225C for < 60 seconds (total thermal budget not to exceed 180C for between 90 to 120 seconds). 2. For SO package, standard lead finish: Reflow at peak temperature of 225C (total thermal budget not to exceed 180C for between 90 to 150 seconds). 3. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260C (total thermal budget not to exceed 245C for greater than 30 seconds). CAUTION: Negative undershoots below -0.3V are not allowed on any pin while in the Battery Back-up mode. CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
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M40Z300AV
DC AND AC PARAMETERS
This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived from tests performed under the MeasureTable 4. DC and AC Measurement Conditions
Parameter VCC Supply Voltage Grade 1 Ambient Operating Temperature Grade 6 Load Capacitance (CL) Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages
Note: Output High Z is defined as the point where data is no longer driven.
ment Conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters.
M40Z300AV 3.0 to 3.6V 0 to 70C -40 to 85C 50pF 5ns 0 to 3V 1.5V
Figure 9. AC Testing Load Circuit
DEVICE UNDER TEST
333
CL = 50pF
1.73V
CL includes JIG capacitance
AI08897
Table 5. Capacitance
Symbol CIN COUT(3) Parameter(1,2) Input Capacitance Input/Output Capacitance Min Max 8 10 Unit pF pF
Note: 1. Sampled only, not 100% tested. 2. At 25C, f = 1MHz. 3. Outputs deselected.
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M40Z300AV
Table 6. DC Characteristics
Sym ILI(2) ICC VIL VIH VOL VOH VOHB IOUT1 IOUT2 ICCDR VPFD VSO VBAT
Note: 1. 2. 3. 4.
Parameter Input Leakage Current Supply Current Input Low Voltage Input High Voltage Output Low Voltage Output Low Voltage (open drain)(3) Output High Voltage VOH Battery Back-up(4) VOUT Current (Active) VOUT Current (Battery Back-up) Data Retention Mode Current(5) Power-fail Deselect Voltage (THS = VSS)(6) Battery Back-up Switchover Voltage Battery Voltage
Test Condition(1) 0V VIN VCC Outputs open
Min
Typ
Max 1
Unit A mA V V V V V
2 -0.3 2.0
4 0.8 VCC + 0.3 0.4 0.4
IOL = 4.0mA IOL = 10mA IOH = -2.0mA IOUT2 = -1.0A VOUT > VCC -0.3 VOUT > VCC -0.2 VOUT > VBAT -0.3 100 2.4 2.0 2.9
3.6 150 100
V mA mA A
100 2.8 2.7 2.0 2.9 2.8 2.9 3.0 2.9 3.6
nA V V V
Valid for Ambient Operating Temperature: TA = 0 to 70C or -40 to 85C; VCC = 3.0 to 3.6V (except where noted). Outputs deselected. For RST & BL pins (Open Drain). Chip Enable outputs (E1CON - E4CON) can only sustain CMOS leakage currents in the battery back-up mode. Higher leakage currents will reduce battery life. 5. Measured with VOUT and E1CON - E4CON open. 6. THS pin must ben tied to VSS.
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M40Z300AV
Figure 10. Power Down Timing
VCC VPFD (max) VPFD VPFD (min) VSO
tF tFB
E tWPT VOHB E1CON-E4CON
RST
AI02398B
Figure 11. Power Up Timing
VCC VPFD (max) VPFD VPFD (min) VSO
tR tRB E tEDH E1CON-E4CON VOHB tREC RST
AI02399B
tCER
tEDL
12/20
M40Z300AV
Table 7. Power Down/Up Mode AC Characteristics
Symbol tF(2) tFB(3) tR tEDL tEDH tAS tCER tREC(4) tWPT tRB Parameter(1) VPFD (max) to VPFD (min) VCC Fall Time VPFD (min) to VSS VCC Fall Time VPFD(min) to VPFD (max) VCC Rise Time Chip Enable Propagation Delay Low Chip Enable Propagation Delay High A, B set up to E Chip Enable Recovery VPFD (max) to RST High Write Protect Time VSS to VPFD (min) VCC Rise Time 0 40 40 40 1 120 120 250 Min 300 150 10 20 20 Max Unit s s s ns ns ns ms ms s s
Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70C or -40 to 85C; VCC = 3.0 to 3.6V (except where noted). 2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200 s after VCC passes VPFD (min). 3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data. 4. tREC (min) = 20ms for industrial temperature Grade 6 device.
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M40Z300AV
PACKAGE MECHANICAL INFORMATION
Figure 12. SOH28 - 28-lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Outline
A2 B e
A C eB CP
D
N
E
H A1 L
1 SOH-A
Note: Drawing is not to scale.
Table 8. SOH28 - 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data
mm Symbol Typ A A1 A2 B C D E e eB H L N CP 1.27 0.05 2.34 0.36 0.15 17.71 8.23 - 3.20 11.51 0.41 0 28 0.10 Min Max 3.05 0.36 2.69 0.51 0.32 18.49 8.89 - 3.61 12.70 1.27 8 0.050 0.002 0.092 0.014 0.006 0.697 0.324 - 0.126 0.453 0.016 0 28 0.004 Typ Min Max 0.120 0.014 0.106 0.020 0.012 0.728 0.350 - 0.142 0.500 0.050 8 inches
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M40Z300AV
Figure 13. SH - 4-pin SNAPHAT Housing for 48mAh Battery, Package Outline
A1
A2 A A3
eA D
B eB
L
E
SHZP-A
Note: Drawing is not to scale.
Table 9. SH - 4-pin SNAPHAT Housing for 48mAh Battery, Package Mechanical Data
mm Symbol Typ A A1 A2 A3 B D E eA eB L 0.46 21.21 14.22 15.55 3.20 2.03 6.73 6.48 Min Max 9.78 7.24 6.99 0.38 0.56 21.84 14.99 15.95 3.61 2.29 0.018 0.835 0.560 0.612 0.126 0.080 0.265 0.255 Typ Min Max 0.385 0.285 0.275 0.015 0.022 0.860 0.590 0.628 0.142 0.090 inches
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M40Z300AV
Figure 14. SH - 4-pin SNAPHAT Housing for 120mAh Battery, Package Outline
A1
A2 A A3
eA D
B eB
L
E
SHZP-A
Note: Drawing is not to scale.
Table 10. SH - 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data
mm Symbol Typ A A1 A2 A3 B D E eA eB L 0.46 21.21 17.27 15.55 3.20 2.03 8.00 7.24 Min Max 10.54 8.51 8.00 0.38 0.56 21.84 18.03 15.95 3.61 2.29 0.018 0.835 0.680 0.612 0.126 0.080 0.315 0.285 Typ Min Max 0.415 .0335 0.315 0.015 0.022 0.860 0.710 0.628 0.142 0.090 inches
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M40Z300AV
Figure 15. SO16 - 16-lead Plastic Small Outline, 150 mils body width, Package Outline
A2 B e D
A C CP
N
E
1
H A1 L
SO-b
Note: Drawing is not to scale.
Table 11. SO16 - 16-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data
mm Symbol Typ. A A1 A2 B C D E e H L N CP 1.27 0.35 0.19 9.80 3.80 - 5.80 0.40 0 16 0.10 0.10 Min. Max. 1.75 0.25 1.60 0.46 0.25 10.00 4.00 - 6.20 1.27 8 0.050 0.014 0.007 0.386 0.150 - 0.228 0.016 0 16 0.004 0.004 Typ. Min. Max. 0.069 0.010 0.063 0.018 0.010 0.394 0.158 - 0.244 0.050 8 inches
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M40Z300AV
PART NUMBERING
Table 12. Ordering Information Example
Example: M40Z 300AV MQ 6 F
Device Type M40Z
Supply and Write Protect Voltage 300AV = VCC = 3.0 to 3.6V THS = VSS; 2.8V VPFD 3.0V
Package MQ = SO16 MH (1,2) = SOH28
Temperature Range 1 = 0 to 70C 6 = -40 to 85C
Shipping Method for SOIC E = Lead-free Package (ECO F = Lead-free Package (ECO PACK(R)), Tubes PACK(R)), Tape & Reel
Note: 1. The SOIC package (SOH28) requires the battery package (SNAPHAT(R)) which is ordered separately under the part number "M4Zxx-BR00SH" in plastic tube or "M4Zxx-BR00SHTR" in Tape & Reel form. Caution: Do not place the SNAPHAT battery package "M4Zxx-BR00SH" in conductive foam as it will drain the lithium button-cell battery. 2. Contact Local Sales Office for availability of SNAPHAT (MH) package.
For a list of available options (e.g., Speed, Package) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. Table 13. SNAPHAT(R) Battery Table
Part Number M4Z28-BR00SH M4Z32-BR00SH Description Lithium Battery (48mAh) SNAPHAT Lithium Battery (120mAh) SNAPHAT Package SH SH
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M40Z300AV
REVISION HISTORY
Table 14. Document Revision History
Date November 14, 2003 19-Nov-03 09-Mar-04 Version 1.0 1.1 2.0 First Issue Correct shipping information (Table 12) Reformatted; updated Lead-free information (Table 3, 12) Revision Details
M40Z300AV, 40Z300AV, Z300AV, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery,Battery, Battery, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, THS, THS, THS, THS, THS, THS, THS, THS, THS, THS, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V,
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M40Z300AV
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequ of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is g by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are s to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products a authorized for use as critical components in life support devices or systems without express written approval of STMicroelectron The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States www.st.com
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